PCB Manufacturer & PCB Assembly

Timing analysis of data retention time

Posted on August 30, 2018 by G

In order to successfully latch data into the device, the data signal must remain active at the input of the receiving chip for a sufficient amount of time to ensure that the signal is correctly latched by the clock sample. This time is called hold time. In the common clock bus, the receiver buffer latches the data with the second clock edge while latching the next data to the data transmitter on the driver side. Therefore, in order to satisfy the receiving end holding time, it is necessary to ensure that the valid data is latched into the receiving terminal flip-flop before the next data signal arrives, which requires that the delay of receiving the clock CLKA is smaller than the delay of receiving the data signal.

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Timing analysis of data setup time

Posted on August 30, 2018 by G

One of the two necessary conditions for data transmission: the data at the input of RECEIVER generally has the required setup time Tsetup, which means that the data must be valid before the minimum time valid for the clock, and the time at which the data signal arrives at the input should be early enough. At the clock signal, the inequality satisfied by the settling time can be derived.

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Analyze timing analysis and simulation strategy in high speed PCB design

Posted on August 27, 2018 by G

In the field of network communication, in ATM switches, core routers, Gigabit Ethernet, and various gateway devices, the system data rate and clock rate continue to increase, and the operating frequency of the corresponding processor is also higher; data, voice, and image transmission.

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Tag: hardware design high-speed circuits

How to solve EMI to improve the performance of multi-layer PCB

Posted on August 27, 2018 by G

In the design of power circuit, electromagnetic interference is one of the key factors affecting product performance. At present, there are many ways to solve the problem of EMI for engineers. Generally, methods for suppressing EMI include: EMI suppression coating, EMI simulation. Design and selection of suitable EMI suppression parts. This article will start with the PCB, and introduce the role and design skills of PCB layered stacking in controlling EMI radiation.

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The core of PCB design - solving problems

Posted on August 27, 2018 by G

Conducting printed circuit board (PCB) design refers to the production of circuit boards at the lowest possible cost by designing schematic drawings and wiring layout. In the past, this usually required expensive tools, but now, with the availability of free high-performance software tools such as DesignSpark PCBs and design models, the speed of board designers has been greatly accelerated.

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Characteristic impedance problem in high speed design

Posted on August 24, 2018 by G

In high speed designs, the characteristic impedance of the controllable impedance plates and lines is one of the most important and common problems. First, let's look at the definition of a transmission line: a transmission line consists of two conductors of a certain length, one for transmitting signals and the other for receiving signals (remember that the "loop" replaces the concept of "ground"). In a multi-layer board, each line is part of a transmission line, and an adjacent reference plane can be used as a second line or loop. The key to a line becoming a "good performance" transmission line is to keep its characteristic impedance constant throughout the line.

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About research on impedance matching

Posted on August 24, 2018 by G

In high-speed designs, the matching of impedance is related to the quality of the signal. The technique of impedance matching can be said to be rich and varied, but how to make a reasonable application in a specific system requires measuring various factors. For example, in our design in the system, many of them use the serial matching of the source segment. Why do you need to match and what kind of matching is used? For example, the majority of the differential matching uses the matching of the terminal; the clock uses the source segment matching.

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Tag: impedance matching terminal matching

What is EMI, EMS and EMC?

Posted on August 20, 2018 by G

There are many English abbreviations in the field of electrical interference.

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Routing rules for PCB high-speed boards of four or more layers

Posted on August 20, 2018 by G

The PCB board is divided into many layers. What are the techniques for the high four-layer routing? Let me introduce you to the following.

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Extend probe bandwidth to improve signal fidelity

Posted on August 20, 2018 by G

As memory designs become more complex and compact, and data rates are increasing, the use of BGA probes to detect DDR DRAM is becoming more popular and has become a requirement. The DDR3 and DDR4 data rates have increased from 800 MT/s to approximately 3200 MT/s. Memory system designers are concerned about whether current BGA probe designs can meet high bandwidth requirements for optimal signal fidelity. Signal fidelity is important for accurate DDR conformance measurements based on JEDEC specifications. In addition, the memory designer needs to perform signal integrity measurements to complete the margin test. Moreover, the margin after eliminating the DDR BGA probe detection effect can be used to design components with lower tolerances. This article describes a new probe calibration method for scalable DDR BGA probe bandwidth to increase the margin of signal integrity testing and minimize errors caused by DDR BGA probes.

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The Test of Characteristic Impedance

Posted on August 17, 2018 by G

When a square wave of a signal is propelled forward by a high-level positive pressure signal in the signal line of the transmission line assembly, the theoretical reference layer (such as the ground layer) is theoretically necessary. The negative pressure signal induced by the electric field is accompanied by the forward path (equal to the return path of the positive pressure signal reverse path), so that the integral loop system can be completed. If the "signal" advances its flight time for a short period of time, it can be imagined that it suffers from the instantaneous impedance value (Instantanious Impedance) from the signal line, the dielectric layer and the reference layer. This is called "Characteristic impedance."

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Some easy-to-understand explanations of characteristic impedance

Posted on August 17, 2018 by G

The abstract and complicated digital high-speed logic principle, how to transmit the square wave signal in the transmission line, and how to ensure its signal integrity (Signal Integrity), reduce the noise of its noise (Noise) and other professional expressions, if simple The example of life is explained, but instead of moving a bunch of mathematical formulas and difficult physics language, it is the inspiration and benefit for novices or interlocutors.

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Anti-interference ability and electromagnetic compatibility

Posted on August 13, 2018 by G

How to improve anti-interference ability and electromagnetic compatibility when developing electronic products with processors?

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Tag: circuits high-speed chips

How to resist electromagnetic interference (2)

Posted on August 13, 2018 by G

5-7 Measures taken to increase the system's ability of it.

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How to resist electromagnetic interference (1)

Posted on August 13, 2018 by G

1-4 Measures taken to increase the system's ability of it.

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Methods of avoiding transmission line effects

Posted on August 10, 2018 by G

For the impact of the transmission line problem, we will talk about the ways to control these effects from the following aspects.

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Transmission Line Effect - High Speed PCB Design Guide

Posted on August 10, 2018 by G

Based on the transmission line model, in summary, the transmission line will have the following effects on the overall circuit design.

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High Speed PCB Design Guide

Posted on August 10, 2018 by G

High-speed circuit design is a very complex design process. There are several factors that need to be considered when designing a high speed circuit. These factors are sometimes opposite each other. Such as the high-speed device layout when the position is close, although the delay can be reduced, but crosstalk and significant thermal effects may occur. Therefore, in the design, we must weigh the various factors and make a comprehensive compromise; not only meet the design requirements, but also reduce the design complexity. The adoption of high-speed PCB design means the controllability of the design process. Only controllable is reliable.

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PCB Layout - High Speed PCB Design Guide

Posted on August 10, 2018 by G

In design, layout is an important part. The quality of the layout results will directly affect the effect of the wiring, so it can be considered that a reasonable layout is the first step in the success of PCB design.

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PCB Routing - High Speed PCB Design Guide

Posted on August 10, 2018 by G

In the PCB design, wiring is an important step to complete the product design. It can be said that the previous preparation work is done for it. In the whole PCB, the wiring design process is the highest, the trick is the finest, and the workload is the largest. The PCB wiring has single-sided wiring, double-sided wiring, and multilayer wiring. There are two ways to route: automatic routing and interactive wiring. Before automatic routing, you can use interactive pre-wired lines that require more stringent requirements. The edges of the input and output should avoid adjacent parallel to avoid reflection interference. If necessary, ground wire should be isolated. The wiring of two adjacent layers should be perpendicular to each other, and parasitic coupling is easy to occur in parallel.

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Timing analysis of data retention time

Timing analysis of data setup time

Analyze timing analysis and simulation strategy in high speed PCB design

How to solve EMI to improve the performance of multi-layer PCB

The core of PCB design - solving problems

Characteristic impedance problem in high speed design

About research on impedance matching

What is EMI, EMS and EMC?

Routing rules for PCB high-speed boards of four or more layers

Extend probe bandwidth to improve signal fidelity

The Test of Characteristic Impedance

Some easy-to-understand explanations of characteristic impedance

Anti-interference ability and electromagnetic compatibility

How to resist electromagnetic interference (2)

How to resist electromagnetic interference (1)

Methods of avoiding transmission line effects

Transmission Line Effect - High Speed PCB Design Guide

High Speed PCB Design Guide

PCB Layout - High Speed PCB Design Guide

PCB Routing - High Speed PCB Design Guide

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Timing analysis of data retention time

Timing analysis of data setup time

Analyze timing analysis and simulation strategy in high speed PCB design

How to solve EMI to improve the performance of multi-layer PCB

The core of PCB design - solving problems

Characteristic impedance problem in high speed design

About research on impedance matching

What is EMI, EMS and EMC?

Routing rules for PCB high-speed boards of four or more layers

Extend probe bandwidth to improve signal fidelity

The Test of Characteristic Impedance

Some easy-to-understand explanations of characteristic impedance

Anti-interference ability and electromagnetic compatibility

How to resist electromagnetic interference (2)

How to resist electromagnetic interference (1)

Methods of avoiding transmission line effects

Transmission Line Effect - High Speed PCB Design Guide

High Speed ​​PCB Design Guide

PCB Layout - High Speed ​​PCB Design Guide

PCB Routing - High Speed ​​PCB Design Guide

Categories

Recommended Article:

High Speed PCB Design Guide

PCB Layout - High Speed PCB Design Guide

PCB Routing - High Speed PCB Design Guide