PCB Manufacturer & PCB Assembly | Advanced Circuits

Focus on Signal Integrity in Complex Designs

Posted on December 12, 2018 by G

In SoC design, the coupling between signals can cause signal integrity problems. Neglecting signal integrity problems can lead to crosstalk between signals. Reliability, manufacturability and system performance will also be reduced. This article describes the design of ASIC chips. A method for solving signal integrity problems.

1157 1 0 Shares

Wireless Signal Frequency Measurement and Instrument

Posted on December 12, 2018 by G

The frequency measurement is generally performed by a scanning spectrum analyzer, which scans the amplitude of each frequency signal and stores it under a certain resolution bandwidth (RBW), thereby displaying the information of the amplitude as a function of the entire frequency band. The RBW is an important consideration for scanning spectrum analyzers to provide excellent dynamic range and high accuracy of the static spectral components of the signal. However, the main disadvantage of a scanning spectrum analyzer is that it tests the amplitude of a frequency point of the signal only at one point in time.

3325 1 0 Shares

Signal Integrity Analysis: Wireless Signal (Chain)

Posted on December 12, 2018 by G

Wireless signals are an integral part of many embedded systems today, and manufacturers of mobile terminals are discussing media convergence, where consumers can browse the web or watch the game in a notebook, mobile phone, portable digital TV or PDA.

2582 1 0 Shares

Design and Development of High Speed Digital PCB

Posted on December 07, 2018 by G

Through the calculation and analysis of signal integrity to find the solution space of the design, and finally on the basis of the solution space to complete the PCB board design and verification.

2939 1 0 Shares

Design Model of High Speed Digital PCB Based on Signal Integrity Analysis

Posted on December 07, 2018 by G

As integrated circuit output switching speeds increase and PCB board density increases, signal integrity has become one of the issues that must be addressed in high-speed digital PCB design. Factors such as components and PCB boards, layout of components on the PCB, and wiring of high-speed signals can cause signal integrity problems, resulting in unstable system operation or even no work at all.

2685 1 0 Shares

Introduction to Signal Integrity Simulation Models and Tools

Posted on December 04, 2018 by G

There are many simulation tools for analyzing signal integrity, each with its own characteristics.

3535 1 0 Shares

Signal Integrity Solutions

Posted on December 04, 2018 by G

For chip design, there are usually two ways to solve signal integrity problems. The RF solution focuses on the transmission line, often using impedance matching on the package boundary, while the digital (ie, broadband) solution emphasizes the choice of package, controlling the number of simultaneous switching and switching speed, and using between the external power supply pins of the package and ground. Bypass capacitors, the capacitance inside the IC is achieved by the overlap of the metal layers, which provides a local low-impedance path for high-speed transient currents to prevent ground bounce.

3051 1 0 Shares

Regarding SI, You Should Know the Following Points

Posted on December 04, 2018 by G

Signal Integrity is a state in which the signal is not damaged. It shows that the signal maintains its correct functional characteristics after transmission through the signal line. The signal can respond with correct timing and voltage in the circuit. It can be known from the timing of the IC if the signal is in steady state time (in order to correctly identify and process the data, The IC requires a large transition within the time period during which the input data remains unchanged before and after the clock edge, and the IC may misjudge or lose part of the data. If the signal has good signal integrity, the circuit has the correct timing relationship and signal amplitude, and the data will not be captured by mistake, which means that the receiver can obtain relatively pure data. Conversely, if a signal integrity fault such as false triggering, damped oscillation, overshoot, undershoot occurs, any signal transition will occur, causing the input distortion data to be sent into the latch or captured on the distorted clock edge. Data, the signal can not respond properly, resulting in abnormal system operation and performance degradation.

2608 1 0 Shares

PCB Design Guidelines for Ensuring Signal Integrity

Posted on November 30, 2018 by G

The earlier the signal integrity (SI) problem is solved, the more efficient the design is, so that the termination of the device is not added until the board design is complete. There are many tools and resources for SI design planning. This article explores the core issues of signal integrity and several methods for solving SI problems, ignoring the technical details of the design process.

3001 1 0 Shares

Case Analysis of Signal Integrity Verification (2)

Posted on November 28, 2018 by G

Signal integrity issues have different ways of expressing them. The timing problem is always the first, and the shortening of the signal rise time and fall time will first cause timing problems in the designed system. Secondly, signal oscillation, signal overshoot and undershoot due to transmission line effects can pose a great threat to the fault tolerance and monotonicity of the design system. In slow systems, interconnect delays and signal oscillations are often overlooked by design engineers, primarily because signal sway caused by transmission line effects has sufficient time to stabilize in slow systems. However, as signal transitions continue to increase and system clock frequencies continue to increase, the time it takes for signals to travel between devices and prepare for clock timing is greatly reduced. The severity of the problem has suddenly increased and the likelihood of failure has increased rapidly.

2752 5 0 Shares

Case Analysis of Signal Integrity Verification (1)

Posted on November 28, 2018 by G

Regarding signal integrity issues, when the system clock exceeds 50 MHz, the signal interconnect on the board introduces signal delays on the timing path, and these signal delays constrain the performance of the board-level design. How the transmission line effect will quickly introduce serious signal integrity issues like signal oscillation, overshoot and undershoot, and how these issues will threaten the noise tolerance of the design and the monotonic consistency principle of the design.

2618 5 0 Shares

Applying PCB Design Tools to Solve SI Problems

Posted on November 28, 2018 by G

Such as skin effect and dielectric loss, effects of vias and connectors, differential signaling and routing considerations, power distribution and EMI control.

2814 4 0 Shares

Tag: Gigabit system PCB PCB material

Signal Integrity Design for Gigabit Device PCBs

Posted on November 28, 2018 by G

This article focuses on some of the signal integrity issues that PCB design needs to consider in gigabit device data transfers.

2784 1 0 Shares

Signal Integrity Research: Understanding Critical Length

Posted on November 26, 2018 by G

Many people are very vague about the concept of the critical length of the lines on the PCB. Even many people don't even know the concept. If you design a high-speed circuit board but don't know the concept, you can be sure that the final board may not work stably. And you are confused, you can't start debugging.

2917 1 0 Shares

Signal Integrity Research: Emphasis on Signal Rise Time

Posted on November 26, 2018 by G

The rise time of the signal is critical to understanding the signal integrity problem. Most of the problems in high-speed pcb design are related to it, and you must pay enough attention to him.

2750 1 0 Shares

PCB Simulation and Design of DDR3 Memory

Posted on November 26, 2018 by G

Today's computer system DDR3 memory technology has been widely used, and the data transmission rate has been repeatedly improved, and has now reached 1866Mbps. Under such high-speed bus conditions, to ensure the reliability of data transmission quality and meet the timing requirements of parallel buses, it poses great challenges to design implementation.

2995 1 0 Shares

Through Hole Design of PCB Impedance Controlled

Posted on November 23, 2018 by G

To maintain signal integrity on printed circuit boards, a unique approach to inter-layer interconnects (vias) that allows the trace impedance to be accurately matched should be used.

2741 1 0 Shares

Signal Integrity Analysis of MCM High Speed Circuit Layout Design

Posted on November 23, 2018 by G

With the increase of package density and the increase of operating frequency, the signal integrity problem in MCM circuit design can not be ignored. Taking the detector circuit as an example, this paper firstly uses APD software to realize the layout and layout design of the circuit, and then combines the signal integrity analysis to adjust the circuit layout and wiring structure repeatedly. The final Spectra Quest software simulation results show that the improved circuit layout and routing Meet signal integrity requirements while maintaining high simulation accuracy.

2926 1 0 Shares

The First 12 Reasons for the Designation of DC Trace Impedance

Posted on November 20, 2018 by G

More and more manufacturers are requesting the DC trace impedance on the PCB. The reasons for specifying and controlling the DC trace impedance are given below from the designer's point of view.

2720 5 0 Shares

Serial Bus Design Related Advantages Analysis Solution

Posted on November 20, 2018 by G

As the current demand for speed and bandwidth for communications and computer systems continues to rise, system designers are facing a severe test. The parallel bus structure tested in time series is close to the limit of its capability, and the bus width is now over 64 bits, which makes the circuit layout extremely complicated. In addition, the large number of signals in a wide parallel bus are also very cumbersome to synchronize, especially as these signals are subject to random factors such as noise and crosstalk.

2758 1 0 Shares

Focus on Signal Integrity in Complex Designs

Wireless Signal Frequency Measurement and Instrument

Signal Integrity Analysis: Wireless Signal (Chain)

Design and Development of High Speed Digital PCB

Design Model of High Speed Digital PCB Based on Signal Integrity Analysis

Introduction to Signal Integrity Simulation Models and Tools

Signal Integrity Solutions

Regarding SI, You Should Know the Following Points

PCB Design Guidelines for Ensuring Signal Integrity

Case Analysis of Signal Integrity Verification (2)

Case Analysis of Signal Integrity Verification (1)

Applying PCB Design Tools to Solve SI Problems

Signal Integrity Design for Gigabit Device PCBs

Signal Integrity Research: Understanding Critical Length

Signal Integrity Research: Emphasis on Signal Rise Time

PCB Simulation and Design of DDR3 Memory

Through Hole Design of PCB Impedance Controlled

Signal Integrity Analysis of MCM High Speed Circuit Layout Design

The First 12 Reasons for the Designation of DC Trace Impedance

Serial Bus Design Related Advantages Analysis Solution

Categories

Recommended Article:

BLOG

Focus on Signal Integrity in Complex Designs

Wireless Signal Frequency Measurement and Instrument

Signal Integrity Analysis: Wireless Signal (Chain)

Design and Development of High Speed Digital PCB

Design Model of High Speed Digital PCB Based on Signal Integrity Analysis

Introduction to Signal Integrity Simulation Models and Tools

Signal Integrity Solutions

Regarding SI, You Should Know the Following Points

PCB Design Guidelines for Ensuring Signal Integrity

Case Analysis of Signal Integrity Verification (2)

Case Analysis of Signal Integrity Verification (1)

Applying PCB Design Tools to Solve SI Problems

Signal Integrity Design for Gigabit Device PCBs

Signal Integrity Research: Understanding Critical Length

Signal Integrity Research: Emphasis on Signal Rise Time

PCB Simulation and Design of DDR3 Memory

Through Hole Design of PCB Impedance Controlled

Signal Integrity Analysis of MCM High Speed ​​Circuit Layout Design

The First 12 Reasons for the Designation of DC Trace Impedance

Serial Bus Design Related Advantages Analysis Solution

Categories

Recommended Article:

Signal Integrity Analysis of MCM High Speed Circuit Layout Design