Signal integrity analysis model

There are a variety of models in electronic design that can be used for PCB board level signal integrity analysis, the three most commonly used are SPICE, IBIS and Verilog-AMS, VHDL-AMS.

1. SPICE model

Spice is the abbreviation of Simulation Program with Integrated Circuit Emphasis. It is a powerful general-purpose analog circuit simulator that has been developed for decades. It is developed by the Department of Electrical and Computer Science at the University of California, Berkeley. In the circuit analysis program of integrated circuits, Spice's netlist format became the standard for the description of common analog circuits and transistor-level circuits. The first version was completed in 1972 and was written in Fortran. It was officially put into practical use in 1975. The version, which was designated as the national industrial standard in the United States in 1988, is mainly used for the design and simulation of electronic systems such as ICs, analog circuits, digital-analog hybrid circuits, and power supply circuits. Because the Spice simulation program adopts a completely open policy, users can modify it according to their own needs, and with good practicality, they can be quickly promoted and transplanted to multiple operating system platforms.

Since the advent of Spice, its version has been updated continuously, there are multiple versions of Spice2, Spice3, etc. The new version is mainly enhanced in circuit input, graphics, data structure and execution efficiency. It is widely believed that Spice2G5 is the most successful and effective. The later versions are only partial changes. At the same time, a variety of commercial Spice circuit simulation tools based on Berkeley's Spice simulation program are also produced, running on PC and UNIX platforms, many of which are based on the original SPICE 2G6 version of the source code, which is a public release. The versions, they all do a lot of practical work on the basis of Spice, the more common Spice simulation software is Hspice, Pspice, Spectre, Tspice, SmartSpcie, IsSpice, etc., although their core algorithms are the same, but the simulation speed, accuracy It is not the same as convergence, among which Hspice of Synopsys and Pspice of Cadence are the most famous. Hspice is the de facto Spice industry standard simulation software. It is the most widely used in the industry. It has high precision and powerful simulation functions, but it has no front-end input environment. It needs to prepare the netlist file beforehand. It is not suitable for primary users. For integrated circuit design; Pspice is the best choice for individual users, with a graphical front-end input environment, user-friendly interface, cost-effective, mainly used in PCB board and system level design.

The SPICE simulation software consists of a model and an emulator. Since the model is tightly integrated with the simulator, it is difficult for users to add new model types, but it is easy to add new models, just set new parameters for existing model types.

The SPICE model consists of two parts: Model Equations and Model Parameters. Since the model equations are provided, the SPICE model can be closely coupled with the simulator's algorithm to achieve better analysis efficiency and analysis results.

The SPICE model is now widely used in electronic design for nonlinear DC analysis, nonlinear transient analysis, and linear AC analysis. Elements in the circuit being analyzed may include resistors, capacitors, inductors, mutual inductance, independent voltage sources, independent current sources, various linearly controlled sources, transmission lines, and active semiconductor devices. SPICE has a built-in semiconductor device model, and the user only needs to select the model level and give the appropriate parameters.

When using the SPICE model for SI analysis at the PCB level, integrated circuit designers and manufacturers are required to provide detailed and accurate descriptions of the SPICE model and semiconductor characteristics of the integrated circuit I/O unit sub-circuit. Since these materials are usually intellectual property and confidentiality of designers and manufacturers, only a small number of semiconductor manufacturers will provide the corresponding SPICE models while providing chip products.

The accuracy of the SPICE model analysis depends mainly on the source of the model parameters (ie, the accuracy of the data) and the scope of application of the model equations. The combination of model equations with various digital simulators may also affect the accuracy of the analysis. In addition, the SPICE model of the PCB board level has a large amount of simulation calculation, and the analysis is time consuming.

2. IBIS model

IBIS is the abbreviation of I/O Buffer Information Specification. It is a method based on I/V curve for fast and accurate modeling of I/O BUFFER. It is an international standard that reflects the electrical characteristics of chip driving and receiving. It provides a A standard file format to record parameters such as drive source output impedance, rise/fall time, and input load, making it ideal for calculations and simulations in high-speed circuit designs such as oscillation and crosstalk.

In order to develop a unified IBIS format, EDA companies, IC vendors and end users set up an IBIS format development committee, and the IBIS Open Forum was born. It is composed of some EDA vendors, computer manufacturers, semiconductor manufacturers and universities. In 1993, the format development committee introduced IBIS's first standard, Version 1.0, which was revised over time. The latest official version is Version 4.1, which was released in 2004. V4.1 mainly supports multi-language models. Including Berkeley SPICE, VHDL-AMS and Verilog-AMS, the IBIS model has the ability to model the entire system. The scope of the model application has been greatly expanded, but this requires a hybrid simulation engine that supports these models to perform simulation. Therefore, the large-scale application of the model's software will take time. The IBIS standard has been approved by the EIA and is defined as the ANSI/EIA-656-A standard. Each new version adds some new content, but these new content are just optional items in an IBIS model file rather than mandatory items, which guarantees backward compatibility of the IBIS model.

Now, dozens of EDA companies have become members of the IBIS Open Forum, and EDA companies that support IBIS offer IBIS models and software simulation tools for different devices. More and more semiconductor manufacturers are beginning to offer their own IBIS models. Since the IBIS model does not need to describe the internal design of the I/O unit and the transistor manufacturing parameters, it is welcomed and supported by semiconductor manufacturers. Now major digital IC manufacturers are able to provide the corresponding IBIS models while providing chips.

The IBIS specification itself is just a file format that describes how to record the different parameters of a chip's driver and receiver in a standard IBIS file, but does not explain how these recorded parameters are used. These parameters need to be used by the IBIS model. The simulation tool to read.

The IBIS model only provides a description of the behavior of the driver and receiver, but does not reveal the intellectual property details of the internal construction of the circuit. In other words, vendors can use the IBIS model to illustrate their latest door-level design work without revealing too much product information to their competitors. Moreover, because IBIS is a simple model, the PCB level simulation is performed by look-up table calculation, so the calculation amount is small, and the calculation amount is 10 to 15 times less than the corresponding full Spice triode model simulation.

IBIS provides two complete I/V curves that represent the drive's high and low states, as well as the state transitions at a determined slew rate. The role of the I/V curve is to provide IBIS with the ability to model nonlinear effects such as protection diodes, TTL totem pole drive sources, and emitter follower outputs. The accuracy of the analysis of the IBIS model depends mainly on the number of data points and the accuracy of the data in the I/V and V/T tables.

3. Verilog-AMS model and VHDL-AMS model

Compared to the Spice model and the IBIS model, the Verilog-AMS and VHDL-AMS models appear later, and are a behavioral model language. As a hardware behavioral modeling language, Verilog-AMS and VHDL-AMS are supersets of Verilog and VHDL, respectively, while Verilog-A is a subset of Verilog-AMS.

In the analog/mixed-signal (AMS) language, unlike the SPICE and IBIS models, in the AMS language, the equations describing the behavior of the components are written by the user. Similar to the IBIS model, the AMS modeling language is a stand-alone model format that can be applied to many different types of simulation tools. The AMS equation can also be written at many different levels: transistor level, I/O unit level, I/O unit group, etc. The only requirement is that the manufacturer can write an equation that describes the port input/output relationship.

In fact, the AMS model can also be used on non-electrical system components. In general, you can write a model that is simpler to speed up the simulation. A more detailed model often requires more time to simulate. In some cases, a relatively simple behavioral model is more accurate than the Spice model.

Since Verilog-AMS and VHDL-AMS are both new standards, they have only been adopted for nearly five years. So far only a few semiconductor manufacturers have been able to provide AMS models, and currently can support AMS simulators as well as SPICE and IBIS. Less. However, the feasibility and accuracy of the AMS model in PCB board-level signal integrity analysis are not inferior to the SPICE and IBIS models.