Next Generation Design Tools Outlook

Tools must have the ability to pass intelligent data. For example, the emerging Advanced Library Format (ALF) standard that supports mathematical models can pass multiple attributes without modifying the original calculations and data formats. For new highly complex and demanding designs, it is necessary to plan solutions to problems in the early stages of the design process, since the corrections are most effective at this time. Links between design, verification, place and route, and final physical verification require consistent exchange of data without the need to modify the data or perform additional calculations.

With ALF, users can generate test vectors to check power and electron migration, while also testing the functionality of the chip. The test vector can use the probability reference of the extracted chip data to ensure the necessary accuracy. In this way, the entire design flow can be carefully examined. In the early design of the register-level design, engineers can minimize signal crosstalk through careful planning, underlying planning, and power analysis. An asynchronous clock driver developed for some parts of the design will reduce the concurrent switching power surge across the chip while reducing noise and IR drop across the power supply network.

Unfortunately, the value of existing commercial software tools for next-generation product design is very limited.

Although most ASIC vendors have their own internal tool development teams, the main job of these development departments is to integrate separate tools into a complete process, and to design automated runtime environments for these tools. Automatic script to run. Since existing commercial software tools cannot solve the design problems, we will see in the near future that the number of design tools developed internally by ASIC vendors will continue to increase.

However, the problem with tools developed by ASIC vendors is that these tools require more support and training than commercial software tools, because tool developers within ASIC vendors are not responsible for making the tools easy to use and maintain. . They are simply trying to provide quick solutions to some of the key issues facing internal users -- the design engineer team.