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support@nextpcb.comWhether or not to add shielding ground wire depends on the crosstalk/EMI condition on the board. If the shielding ground wire is not handled properly, it may make the situation worse.
77. What are the corresponding countermeasures when using different frequency clock lines?
For the wiring of the clock line, it is best to perform signal integrity analysis, formulate corresponding wiring rules, and perform wiring according to these rules.
78. PCB single-layer board manual wiring, is on the top or bottom?
If it is the top device, the bottom wiring.
79. PCB single-layer board manual wiring, jumper to how to say?
The jumper is a special device in PCB design, only two pads, the distance can be fixed or variable length. It can be added as needed during manual wiring. There will be a straight line on the board and the bill will appear.
80. Suppose you have a 4-layer board. The middle two layers are VCC and GND. The trace goes from top to bottom. The flow path from BOTTOM SIDE to TOP SIDE is via this signal VIA or POWER?
There is no clear statement about the return path of the signal on the via. It is generally believed that the return signal will return from the nearest ground or the via of the power supply. In general simulation, EDA tools treat the vias as a fixed lumped parameter RLC network, which is in fact a worst case estimate.
81. "Implement signal integrity analysis, formulate corresponding wiring rules, and perform wiring according to these rules." How does this sentence be understood?
Before the simulation analysis, a series of layout and wiring strategies to achieve signal integrity can be obtained. Often these strategies translate into some physical rules that constrain the layout and routing of the PCB. The usual rules are topological rules, length rules, impedance rules, parallel spacing and parallel length rules, and so on. The PCB tool can complete the wiring under these constraints. Of course, the effect of the completion is still known through post-emulation verification. In addition, the ICX provided by Mentor supports interconnection synthesis, one-sided wiring, simulation, and one-time pass.
82. How to choose PCB software?
Select the PCB software according to your needs. There are a lot of high-level software available in the market. The key is to see if it suits your design capabilities, design size, and design constraints. The knife is fast and easy to use. Too fast will hurt your hand. To find an EDA manufacturer, please make a product introduction in the past. Everyone sat down and talked about it. Whether you buy it or not, you will gain something.
83. How to understand the concept of broken copper and floating copper?
From the perspective of PCB processing, copper foils with an area smaller than a unit area are generally called broken copper. These too small copper foils may cause problems due to etching errors during processing. From an electrical point of view, the copper foil that does not have any DC network connection is called floating copper, and the floating copper will have an antenna effect due to the influence of surrounding signals. Floating copper may be broken copper, or it may be a large area of copper foil.
84. Is there any relationship between near-end crosstalk and far-end crosstalk and signal frequency and signal rise time? Will they change as they change? If there is a relationship, can there be a formula to explain the relationship between them?
It should be said that the cross-talk caused by the infringing network to the victim network is related to the change of signal, and the faster the change, the greater the cross-talk caused (V=L*di/dt). The effect of crosstalk on the decision of the digital signal on the victim network is related to the frequency of the signal. The faster the frequency, the greater the impact. For details, please refer to related information
85. How to draw bound IC in PROTEL?
Specifically, the mechanical layer is used to draw the bond diagram in the PCB, IC substrate lining according to IC SPEC. decided to connect vccgndfloat, with mechanical layer print bonding drawing can be.
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