Comparison of SPICE, IBIS and Verilog-AMS, VHDL-AMS models

At present, there are two methods for constructing a device model: one is to look at the electrical operating characteristics of the component, regard the component as a 'black box', measure the electrical characteristics of the port, and extract the device model without involving the working principle of the device. , called the behavioral level model. Representative of this model is the IBIS model and S parameters. The advantage is that it is simple and convenient to model and use, save resources, and has a wide range of applications, especially in the case of high frequency, non-linear, high power, the behavioral level model is almost the only choice. The disadvantage is that the accuracy is poor, the consistency is not guaranteed, and it is affected by the test technique and accuracy. The other is based on the working principle of the components. Starting from the mathematical equations of the components, the obtained device model and model parameters are closely related to the physical working principle of the device.

The SPICE model is one of the most widely used of this model. The advantage is higher precision, especially with the development of modeling methods and the advancement and specification of semiconductor processes, people can provide such models at various levels to meet different precision needs. The disadvantage is that the model is complex and the calculation time is long.

The general driver and receiver models are provided by the device manufacturer. The model of the transmission line is usually extracted from the field analyzer. The package and connector models can be extracted by the field analyzer or by the manufacturer.

1. Compared to the Spice model, the advantages of the IBIS model can be summarized as:

Provides accurate models in terms of I/O nonlinearity, taking into account the parasitic parameters of the package and the ESD structure;

Provide faster simulation speeds than structured methods;

Can be used for system board or multi-board signal integrity analysis simulation. Signal integrity issues that can be analyzed with the IBIS model include: crosstalk, reflection, oscillation, overshoot, undershoot, mismatched impedance, transmission line analysis, topology analysis. IBIS is especially capable of accurate and detailed simulation of high-speed oscillations and crosstalk. It can be used to detect signal behavior under worst-case rise time conditions and some situations that cannot be solved by physical tests;

The model can be obtained free of charge from the semiconductor manufacturer, and the user does not need to pay extra for the model;

Compatible with a wide range of simulation platforms in the industry, almost all signal integrity analysis tools accept IBIS models.

Of course, IBIS is not perfect, it also has the following disadvantages:

Many chip vendors lack support for the IBIS model. Without the IBIS model, the IBIS tool will not work. Although IBIS files can be created manually or automatically converted by the Spice model, any conversion tool can't do anything if you can't get the minimum rise time parameter from the factory.

IB IBIS does not ideally handle circuits with rise-time controlled drive types, especially those with complex feedback;

IB IBIS lacks the ability to model ground bounce noise. The IBIS model version 2.1 contains the mutual inductances that describe the different pin combinations, from which some very useful ground bounce information can be extracted. The reason it doesn't work is the modeling method. When the output transitions from high to low, the large ground bounce voltage can change the behavior of the output driver.

2. Model verification

Regardless of which model and simulation tool you decide to choose, the method you use must be valid. At the very least, the accuracy and completeness of the model must be guaranteed. For example, the IBIS model of a receiver must include the values of Vinl and Vinh, and the IBIS model of the driver must include the value of Vmeas. Data sheets for IBIS models can be checked with graphical display tools such as Mentor's Visual IBIS Editor or Cadence's Model Integrity tool.

At the same time, the model must be verified by the simulator. A simple point-to-point interconnection can be used to verify the model, such as detecting the presence of convergence problems. Note that the interconnection must include at least one transmission line so that it can be observed. The clamping characteristics of reflection, overshoot and clamp diodes.

Finally, the model is again verified by actual hardware testing. Of course, the actual operating conditions of the device may not fully comply with the parameters of the simulation, and the obtained measurement data and the simulation results are not completely consistent, but the reflected device characteristics should be consistent, for example, under the same load conditions, the slope of the edge, overshoot The amplitude, the curve shape of the signal, etc. should be similar.

3. Model selection

Since there is currently no unified model to perform all PCB-level signal integrity analysis, in high-speed digital PCB design, it is necessary to mix the above models to maximize the transmission model of key signals and sensitive signals.

For discrete passive components, either the SPICE model provided by the manufacturer can be sought, or the simplified SPICE model can be directly established and used through experimental measurements, or modeled using specialized modeling tools such as 3D and 2D electromagnetic field model extraction software.

For critical digital integrated circuits, you must look for models provided by the manufacturer, such as the IBIS model or Spice. At present, most IC design and manufacturers can provide the required IBIS model while providing the chip through the Web site or other means. The IBIS model is generally not available, and can be obtained from the manufacturer if needed.

For non-critical integrated circuits, if the manufacturer's IBIS model is not available, a similar or default IBIS model can be selected based on the function of the chip pins. Of course, a simplified IBIS model can also be established by experimental measurements.

For the transmission line on the PCB board, a simplified transmission line SPICE model can be used for signal integrity pre-analysis and solution space analysis, and in the post-layout analysis, the complete transmission line SPICE model needs to be used according to the actual layout design. If you need more accurate analysis, you need to accurately model the transmission line, you can use 2D or 3D model extraction tools.